EDN

Equivalence checker for FPGA optimizations

Santa Cruz, Calif. — To run formal equivalence checking on FPGAs today, designers typically have to turn off sequential optimizations made by synthesis tools. Startup OneSpin Solutions GmbH this week ...
Electronic Design

Equivalence Checker For FPGAs Unearths Synthesis Errors

FPGAs, popular as they are these days for prototyping and/or production runs, come with their own little quirks. One of those is the nagging tendency for functional errors to appear in synthesis and ...
EDN

Synplicity, Lightspeed team on ASIC synthesis

SAN MATEO, Calif. — Streamlined synthesis vendor Synplicity (Sunnyvale, Calif.) will extend its reach into the emerging structured ASIC market next week (March 19 with the announcement of a joint ...
Embedded

Moving from FPGA to ASIC for your AI chip? Here’s what you should know

Perhaps you are designing an embedded inference engine for edge computing. Or you are taking the next step in automotive vision processing. Or maybe you have an insight that can challenge Nvidia and ...
Electronic Design

Synopsys Jumps Into ESL-Synthesis Pool

Interest in design at the electronic-system level (ESL) is surging as more design teams learn that algorithmic-intensive applications lend themselves nicely to such approaches. Not only is ...